uCodeDisasm

> Which machine language is the microcode written in? The mirocode is generally a sequence of uOps. But in Intel's case, there seems to be a more complex mechanism, called XuCode, that generates the uOps sequence. The XuCode ISA seems to be based on x86-64, as Intel says [1]: > XuCode has its own set of instructions based mostly on the 64-bit Instruction Set, removing some unnecessary instructions, and adding a limited number of additional XuCode-only instructions and model specific registers (MSRs) to assist with the implementation of Intel SGX. PS: Decoding of the XuCode microcode can potentially give precious information about uops encoding PS2: You can find more information on uops encoding in another work from the same team [2]. [1]: https://www.intel.com/content/www/us/en/developer/articles/t... [2]: https://github.com/chip-red-pill

They're wider, but that's just because one "word" holds the whole instruction, instead of multiple bytes. In fact, reverse engineering efforts[0] (and the "RISC86" patent[1]) make clear that they're actually "vertical". Intel Goldmont (from [0]) has entries that are 176 bits each, but that's actually three (distinct) 48 bit uops and a 30 bit "sequence word". Horizontal microcode is much simpler for in-order processors, but my understanding of this stuff seems like they wouldn't work well with the superscalar processors of today. Gating the hundreds of control lines seems (to me) like more effort than gating a few dozen bits of a uop. [0]: https://github.com/chip-red-pill/uCodeDisasm [1]: https://patents.google.com/patent/US5926642A