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drom
awesome-hdl
Learning & Reference2019–2025
drom / awesome-hdl

awesome-hdl

Hardware Description Languages

4Distinct people
5Mentions
0Explicit recommenders
1.2KGitHub stars
REPOSITORY AT A GLANCE

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What it is

Hardware Description Languages

GitHub

Where it is used

No documented product use has been verified yet.

What people are saying

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Also in these discussions

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This week on Hacker News

Nov 7–Nov 14 UTC · Direct repository links and separately labeled related project stories. Indexed through 11/14/2026, 5:04:57 PM UTC.

No direct repository links were found in the indexed HN discussions over the past seven days. Older discussions are available below.

Mentions over time

HN mentions by year5 dated mentions

Observed mentions: 2019-01-07 04:01:04 UTC to 2025-05-13 05:33:47 UTC.

012342019-01-01 00:00:00 UTC to 2020-01-01 00:00:00 UTC (exclusive): 4 mentions; 1 submissions, 3 comments20192020-01-01 00:00:00 UTC to 2021-01-01 00:00:00 UTC (exclusive): 0 mentions; 0 submissions, 0 comments2021-01-01 00:00:00 UTC to 2022-01-01 00:00:00 UTC (exclusive): 0 mentions; 0 submissions, 0 comments2022-01-01 00:00:00 UTC to 2023-01-01 00:00:00 UTC (exclusive): 0 mentions; 0 submissions, 0 comments20222023-01-01 00:00:00 UTC to 2024-01-01 00:00:00 UTC (exclusive): 0 mentions; 0 submissions, 0 comments2024-01-01 00:00:00 UTC to 2025-01-01 00:00:00 UTC (exclusive): 0 mentions; 0 submissions, 0 comments2025-01-01 00:00:00 UTC to 2026-01-01 00:00:00 UTC (exclusive): 1 mentions; 0 submissions, 1 comments2025

Counts come from the repository’s dated source evidence. Index cutoff: 2026-11-02 08:16:59 UTC.

View mention counts and date ranges
UTC ranges include their start and exclude their end. Select a period to filter the source evidence.
PeriodStart (UTC)End (exclusive, UTC)MentionsSubmissionsComments
20192019-01-01 00:00:00 UTC2020-01-01 00:00:00 UTC413
20202020-01-01 00:00:00 UTC2021-01-01 00:00:00 UTC000
20212021-01-01 00:00:00 UTC2022-01-01 00:00:00 UTC000
20222022-01-01 00:00:00 UTC2023-01-01 00:00:00 UTC000
20232023-01-01 00:00:00 UTC2024-01-01 00:00:00 UTC000
20242024-01-01 00:00:00 UTC2025-01-01 00:00:00 UTC000
20252025-01-01 00:00:00 UTC2026-01-01 00:00:00 UTC101

What Hacker News says

5 sources
There are 48+2 port switches with OpenWRT support. Re: initial specs for the (4 port) OpenWRT One, which is built on Banana Pi's, which supports U-boot: https://www.cnx-software.com/2024/01/12/openwrt-one-ap-24-xy... .. https://openwrt.org/toh/openwrt/one: > The non-open-source components include the 2.5GbE PHY and WiFi firmware with blobs running on separate cores that are independent of the main SoC where OpenWrt is running. The DRAM calibration routines are closed-source binaries as well. Software for FPGA switch, probe, and GHz oscilloscope projects? /? inurl:awesome vivado https://www.google.com/search?q=inurl%3Aawesome+vivado : awesome-hdl: https://github.com/drom/awesome-hdl : sphinx-hwt: d3-wave probably won't do GHz in realtime. https://github.com/Nic30/d3-wave Pyqtgraph probably can't realtime plot GHz probe data without resam
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pling either? pyqtgraph: https://github.com/pyqtgraph/pyqtgraph The hwtLib README says Vivado supports IP-XACT format. hwtLib: https://github.com/Nic30/hwtLib : > hwtLib is the library of hardware components writen using hwt library. Any component can be exported as Xilinx Vivado (IP-exact) or Quartus IPcore using IpPackager or as raw Verilog / VHDL / SystemC code and constraints by to_rtl() function. Target language is specified by keyword parameter serializer. IP-XACT: https://en.wikipedia.org/wiki/IP-XACT hwtlib docs > hwtLib.peripheral.ethernet package: https://hwtlib.readthedocs.io/en/latest/hwtLib.peripheral.et... hwtLib.peripheral.uart package: https://hwtlib.readthedocs.io/en/latest/hwtLib.peripheral.ua... It looks like there are CRC implementations in hwtlib. Which CRC or hash does U-boot use for firmware flashing? https://www.google.com/search?q=Which+CRC+or+hash+does+U-boo... ... Looks like CRC32 like .zip files but not .tar.gz files. U-boot: https://github.com/u-boot/u-boot OpenWRT docs > "Failsafe mode, factory reset, and recovery mode": https://openwrt.org/docs/guide-user/troubleshooting/failsafe... Open vSwitch: https://en.wikipedia.org/wiki/Open_vSwitch : > Open vSwitch can operate both as a software-based network switch running within a virtual machine (VM) hypervisor, and as the control stack for dedicated switching hardware; as a result, it has been ported to multiple virtualization platforms, switching chipsets, and networking hardware accelerators.[7] "Porting Open vSwitch to New Software or Hardware": https://docs.openvswitch.org/en/latest/topics/porting/ awesome-open-source-hardware: https://github.com/aolofsson/awesome-opensource-hardware awesome-open-hardware: https://github.com/delftopenhardware/awesome-open-hardware : > Journal of Open Hardware (JOH), HardwareX Journal,
In Open Hardware Ethernet Switch project, part 1
Hopefully, it will not only boost RISC-V adoption, but also the FOSS EDA[1][2][3] tools, FPGA[4][5] and ASIC[6][7][8] design tools, various high-level languages, and toolkits to work with hardware designs. You can also follow my idea[9] and initiative to create low-level hardware IR instead of al tools parsing or producing Verilog/VHDL. Apparently, both are a pretty bad fit for chip design, thus many high-level languages[10] were created. [1] KiCAD http://kicad-pcb.org/ [2] Qucs https://github.com/Qucs/qucs [3] gEDA http://www.geda-project.org/ [4] Yosys https://github.com/YosysHQ/yosys [5] SymbiFlow https://symbiflow.github.io [6] The OpenROAD https://theopenroadproject.org [7] The OpenROAD https://github.com/The-OpenROAD-Project [8] Chisel3 https://github.com/freechipsproject/chisel3 [9] https://github.com/SymbiFlow/ideas/issues/19 [10]
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In ARM memo tells staff to stop working with Huawei

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