litedram

Small footprint and configurable DRAM core

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4Distinct people

5Mentions

1Explicit recommenders

588GitHub stars

REPOSITORY AT A GLANCE

What to know before exploring

What it is

Small footprint and configurable DRAM core

GitHub

Where it is used

No documented product use was verified in the last source check.

What people are saying

If you want an open source DDR3 controller to go with your open source SoC I recommend LiteDRAM. Its getting pretty polished. https://github.com/enjoy-digital/litedram

slededit used a recommendation phrase. One indexed comment matches. This is a phrase match, not a verdict.

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Also in these discussions

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This week on Hacker News

Nov 7–Nov 14 UTC · Direct repository links and separately labeled related project stories. Indexed through 11/14/2026, 5:04:57 PM UTC.

No direct repository links were found in the indexed HN discussions over the past seven days. Older discussions are available below.

Mentions over time

HN mentions by year5 dated mentions

Observed mentions: 2018-09-27 16:28:06 UTC to 2022-04-29 14:48:08 UTC.

Counts come from the repository’s dated source evidence. Index cutoff: 2026-11-02 08:16:59 UTC.

View mention counts and date ranges

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Period	Start (UTC)	End (exclusive, UTC)	Mentions	Comments
2018	2018-01-01 00:00:00 UTC	2019-01-01 00:00:00 UTC	2	2
2019	2019-01-01 00:00:00 UTC	2020-01-01 00:00:00 UTC	1	1
2020	2020-01-01 00:00:00 UTC	2021-01-01 00:00:00 UTC	1	1
2021	2021-01-01 00:00:00 UTC	2022-01-01 00:00:00 UTC	0	0
2022	2022-01-01 00:00:00 UTC	2023-01-01 00:00:00 UTC	1	1

What Hacker News says

5 sources

peter_d_sherman·Apr 29, 2022

In LiteDRAM – A fully open-source memory controller targeting LPDDR4/5 for FPGA

mleonhard·May 2, 2020

This normally costs $75k/year. It's the "Entry" level of the ARM Flexible Access program [1]. It's limited to producing one chip per year. This seems low for a startup which needs to iterate. They do not provide a DRAM controller. Startups will have to license one. There is a BSD-licensed controller: LiteDRAM [2]. This ARM offering helps with the first stage of creating an SoC. It's probably about 20% of the effort. The remaining 80% requires a lot of expertise and expensive software and prototyping hardware. University of Washington's Bespoke Silicon Group is developing free tools for the rest of the process: http://bjump.org [1] https://www.arm.com/-/media/global/products/flexible-access-... [2] https://github.com/enjoy-digital/litedram

In Arm is offering early-stage startups free access to its chip designs

rwmj·Oct 20, 2019

There's actually an open source DDR4 controller[1]. To my untrained eyes it looks quite complex. It's written in Python using Migen[2] to generate the HDL. [1] https://github.com/enjoy-digital/litedram [2] https://github.com/m-labs/migen

In Compiling my own SPARC CPU inside a cheap FPGA

slededit·Nov 19, 2018

DDR3 doesn't scramble the data bits, and I don't think DDR4 does either. Here's an open source controller - you can see yourself: https://github.com/enjoy-digital/litedram

In Intel Management Engine JTAG Proof of Concept

slededit·Sep 27, 2018Recommendation phrase

If you want an open source DDR3 controller to go with your open source SoC I recommend LiteDRAM. Its getting pretty polished. https://github.com/enjoy-digital/litedram

In Designing a RISC-V CPU in VHDL: Arty S7 RPU SoC