chips

I simply don't see that there's a big enough difference between traditional garbage collection, refcounting and manual memory management. Each of those can already be implemented in pure WASM (without the new GC support), just more or less awkwardly. As for "just another ISA", there have been CPUs which had separate call- and data-stacks, with the call-stack living on the CPU and not directly accessible to code. In that sense WASM isn't much different then those esoteric CPUs, yet those also implemented "just another ISA". And even though WASM might not allow free control flow, I yet have to see a noticeable performance difference between WASM and native for this type of "worst case code": https://github.com/floooh/chips/blob/f5b6684ff6e899429544b21...

Oh my, the 6502 emulation [1] has fewer lines of assembly code than my (code-generated) implementation has lines of C code [2] :D Very nice use of a macro assembler though [3], makes the code feel very high level. To my defense, my generated code has a lot of redundancies (such as assert(false) which were meant to catch any 'stray cycles' but which are removed in release mode - and it could be more compact if it would use preprocessor macros (but since the code is generated anyway that seemed kinda wrong). [1] https://github.com/zajo/appler/blob/develop/src/65C02.ASM [2] https://github.com/floooh/chips/blob/master/chips/m6502.h [3] https://github.com/zajo/appler/blob/52aaa0f768cdf303438cd2c7...