skywater-pdk

Pretty neat, a python tool that converts Verilog to an IC layout so that you can make your own custom SOC (assuming you have a substantial budget to pay for fab). Since it's not clearly stated on the front page, I had to go digging to figure out what processes it supports. Looks like FreePDK45, which is "an open-source generic process design kit (PDK) (i.e., does not correspond to any real process and cannot be fabricated)" [0], ASAP7 "Warning Work in progress (not ready for use)" [1] and Skywater130 which "As of May 2020, this repository is targeting the SKY130 process node. If the SKY130 process node release is successful then in the future more advanced technology nodes may become available." [2] The floorplanner supports their ZeroSOC [3] which I guess is based on TitanSOC [4] If this sounds negative, it's not, I just couldn't figure

So I would say to that extent they do, the foundries provide dev kits with cells to use on their process, and there's definitely the same incentive, good reusable IP gets you products faster which gets them more business. I think a lot of the landscape is just driven by the sheer cost of getting it wrong. Spinning a pcb is a bummer. Needing a new mask set is so much worse. There is eFabless, among other efforts in the vein you describe, they do a multi project wafer shuttle thing that google sponsors using skywater. It's supposedly an open source PDK, I haven't used it. https://github.com/google/skywater-pdk

"As should be obvious by now, there is no situation where these foundry processes and tools are open source." This is already false. The famous OpenPDK by Skywater (sponsored by Google) is proving this article wrong from the beginning. (https://github.com/google/skywater-pdk) Yes, thats a rather old technology node, but you can now synthesize your free RISC-V design with a free Toolchain (openROAD) onto this open PDK. Amazing times!

This one has an ESP32 and also 8 analog input pins, a weak point of the RP2040's thus far. Raspberry Pi took advantage of the Google 130nm process: https://github.com/google/skywater-pdk, and came up with a visionary device. Sadly no RISC-V.

The commercial tools are indeed very expensive but the required data files can be as much of a problem. Normally you have to sign a bunch of NDAs (non disclosure agreements) to get your hands on the design rules and standard cell libraries supplied by the foundries and required to make the tools work. One effort to organize several previously available open source tools into a practical system is OpenLane, which is based on the DARPA OpenRoad project: https://woset-workshop.github.io/PDFs/2020/a21.pdf Recently, Google has financed a project where a foundry has made its data files available without any NDAs: https://github.com/google/skywater-pdk The combination has made it possible to have completely open source chip designs.