logicanalyzer

PIOs might be heavier on hardware resources >The BIO uses 14597 cells, while the PIO uses 39087 cells and BIO might reach higher clock speeds > when ported to an ASIC flow, the clock rate achieved by the BIO is over 4x that of a PIO implemented in the same process node. but BIO is ~15x less efficient per clock. RP2350 is capable of reading IOs at 400Mbps (https://github.com/gusmanb/logicanalyzer) and bitbanging at 800 Mbps (HSTX). From Bunnie writeup BIO needs 700MHz to do pedestrian 25Mhz SPI.

in this particular case "We need to be able to capture 60 MHz SPI." For something cheap and capable you could try building rp2350 based https://github.com/gusmanb/logicanalyzer, goes up to 400Ms/s. Its just a Pico1/2 with a level shifter board "This is an affordable logic analyzer capable of reaching up to 400Mhz of sampling speed. The analyzer uses a Pico/Pico2 as its core. The analyzer offers 24 channels but can be chained up to 5 devices allowing the sampling of up to 120 channels at once." I havent played with their software yet, but I have a ton of experience with pulseview and while its feature rich it is sluggish and not suited for high speed big volume acquisitions (especially the dreadfully Python 3.4 plugins and Im saying this as an author of one of the plugins) so anything written even half competently might be better.

>This means you have no easy way to do high-accuracy pulse time measurement is 2.5ns (https://github.com/gusmanb/logicanalyzer) to 3.3ns (https://github.com/schlae/pico-dram-tester) resolution not enough for you?

ZuluIDE uses FPGA, PicoIDE is beautiful $1 rp2350 + buffers. rp2040/rp2350 are the best things that raspberry pi ever released. From bitbanging HDMI to 400Msps logic analyzers https://github.com/gusmanb/logicanalyzer?tab=readme-ov-file#...

Few more great writeups: https://map.grauw.nl/articles/low-level-disk/ https://www.unige.ch/medecine/nouspikel/ti99/disks.htm https://scarybeastsecurity.blogspot.com/2021/05/recovering-l... and my own contribution https://github.com/raszpl/sigrok-disk decoder for viewing floppy/hdd tracks in nice GUI using $5 logic analyzers like https://sigrok.org/wiki/Lcsoft_Mini_Board or https://github.com/gusmanb/logicanalyzer

IMHO, the issue [edit: once understood/documented] was overhyped. From browsing blogs/forums you'd think the chip was completely useless. But many uses of the chip didn't run into the problem, and others could be solved with external resistors. Even https://github.com/gusmanb/logicanalyzer eventually found a nice RP2350 design. I think they didn't preannounce because it could have taken longer than expected and people would have held orders in the meantime, which could have been a problem. [1] Although they did do this a little bit: > Eventually all Pico 2 products will use the A4 stepping. While the A3 stepping will not be made available to silicon customers, approximately 30,000 units of A3 inventory will be used to build Pico 2 and Pico 2 W products. ~~I'm hesistant to buy a Pico 2 or Pico 2 W right now because I might get this weird s

RO2040 isn’t slow - it’s literally one of the fastest on the market. It’s a dual core microcontroller that can easily run both cores at 133-250+ MHz. https://github.com/Wren6991/PicoDVI The GPIO on RPi is not very useful for precision work and you’re limited to using SPI (usually to talk to an auxiliary microcontroller). The GPIO on RP2040 is so good that you can use it as 24 channel 100Msps logic analyzer in a pinch. https://github.com/gusmanb/logicanalyzer