PEpeter_d_sherman·Mar 4, 2024
Related: PipelineC: A C-like hardware description language (HDL):
https://github.com/JulianKemmerer/PipelineC
In PipelineC Example: FM Radio Demodulation (FPGA SDR)JulianKemmerer
PipelineC
Python2020–2024
JulianKemmerer / PipelineC
PipelineC
PypelineC: A hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
4Distinct people
7Mentions
0Explicit recommenders
755GitHub stars
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What it is
PypelineC: A hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
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This week on Hacker News
Nov 7–Nov 14 UTC · Direct repository links and separately labeled related project stories. Indexed through 11/14/2026, 5:04:57 PM UTC.
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HN mentions by year7 dated mentions
Observed mentions: 2020-08-17 20:21:30 UTC to 2024-03-04 04:04:00 UTC.
Counts come from the repository’s dated source evidence. Index cutoff: 2026-11-02 08:16:59 UTC.
View mention counts and date ranges
| Period | Start (UTC) | End (exclusive, UTC) | Mentions | Submissions | Comments |
|---|---|---|---|---|---|
| 2020 | 2020-01-01 00:00:00 UTC | 2021-01-01 00:00:00 UTC | 1 | 1 | 0 |
| 2021 | 2021-01-01 00:00:00 UTC | 2022-01-01 00:00:00 UTC | 0 | 0 | 0 |
| 2022 | 2022-01-01 00:00:00 UTC | 2023-01-01 00:00:00 UTC | 3 | 1 | 2 |
| 2023 | 2023-01-01 00:00:00 UTC | 2024-01-01 00:00:00 UTC | 1 | 1 | 0 |
| 2024 | 2024-01-01 00:00:00 UTC | 2025-01-01 00:00:00 UTC | 2 | 1 | 1 |
What Hacker News says
7 sourcesPipelineC Example: FM Radio Demodulation (FPGA SDR)
1 points · Open discussionGenerate non-CPU FPGA circuits from a C-like language
1 points · Open discussionA open-source raytraced game runs as software or as just LUTs in an FPGA, achieving up to 50x efficiency gains.
The project was featured in the embedded news site CNX-Software today.
https://www.cnx-software.com/2022/09/28/3d-game-fpga-50x-mor...
And also in Tom's hardware:
https://www.tomshardware.com/news/fpga-demo-shows-efficiency...
An introductory video is at https://www.youtube.com/watch?v=hn3sr3VMJQU.
It was done with the PipelineC https://github.com/JulianKemmerer/PipelineC autopipelining and CFlexHDL https://github.com/suarezvictor/CFlexHDL C++ parser tools for handling vector and scalar types in fixed and floating point with a clean syntax.
We, proudly :-) believe this is the first interactive 3D raytraced game implemented as a circuit.
Full details here https://raw.githubusercontent.com/JulianKemmerer/PipelineC-G..., and source
Read the rest
If anyone is interested in alternatives to Verilog, check out PipelineC. Great for software folks getting into hardware, helps avoid issues like blocking vs non blocking confusion, whats a register, etc. Lots of other features too.
https://github.com/JulianKemmerer/PipelineC/wiki
In Verilog Is WeirdNeural Network C code in FPGA: A hardware description language intro
1 points · Open discussionPipelineC: A C-like HDL adding automatic pipelining
3 points · Open discussion