Bitgrid

No, I don't have any suggested reading... just a plan of action should it be required. I'm assuming that enough work has been done that it should be possible to build a CRUD application in Pascal, and have it eventually produce working WASM executable code. I have some existing code in pascal[1]... and it would be helpful for it to run in the browser.... lemme see how bad it is making this happen. It'll take a few days, I think. [1] https://github.com/mikewarot/Bitgrid

I'm not sure if the idea[1,2] is stupid, or brilliant... and I'm not arrogant enough to assume its brilliant. I've been nerd sniped by it though, since the 1980s. The basics are simple enough, imagine an FPGA without any routing hardware, just a sea of 4 bit in, 4 bit out Look Up Tables (LUTs). To prevent race conditions, I'd latch the outputs of the cells, and clock then in 2 alternative phases. This makes the thing a horrible FPGA, because latency is the one thing they fight hard to overcome, but on the other hand, it makes it very easy to reason about, and immune to race conditions, timing issues, etc. The gain is that you get almost trivial routing, and essentially all of the transistors devoted to compute. It's what you get when you answer George Gilder's call to "waste transistors".[3] I've got a simulator for the chip, I still need

I can't... you might be able to afford $10k, but right now, I had to think hard before spending $3 last night. I hope to learn enough Verilog/VHDL/RTL to take advantage of the Free Shuttle program they have[1] eventually. Currently, I'm wondering how to go from expressions to code I can load into a bitgrid. The thought of parsing code, building an AST, converting that to an acyclic directed graph of binary expressions, to actual bits to load the grid with.... overwhelms me, and has me putting it off. 8( I do have a working simulator, written in Pascal[2], that can run fairly quickly for toy problems on my desktop PC. So, there's been some progress. I strongly suspect I can get there, but need an accountability buddy to push me along. I used to be a self starter, but I stayed in an IT Admin job too long that crushed it out of me. [1] https

I've been pursuing a path to cheap and easy PetaFLOP on a chip architecture that is decidedly edgy... it might work out great, or might be a miserable failure... the BitGrid[1]. It's dead nuts simple... a cartesian grid of 4 bit input, 4 bit output LUTs, latched and clocked in 2 phases (like the colors on a checkerboard) to prevent race conditions. It's a Turing complete architecture that doesn't have the routing issues of an FPGA because there's no routing hardware in the way. But it is also nuts because there's no routing fabric to get data rapidly across the chip. If you can unlearn the aversion to latency that we've all had since the days of TTL and the IMSAI, you realize that you could clock an array at least 3 Ghz, giving 3 billion answers/second. It's all a question of programming. (Which is where I'm stuck right now, analysis para

I've been pursuing a path that is decidedly edgy... and might work out great, or might be a miserable failure... the BitGrid[1]. It's dead nuts simple... a cartesian grid of 4 bit input, 4 bit output LUTs, latched and clocked in 2 phases (like the colors on a checkerboard) to prevent race conditions. It's a turing complete architecture that doesn't have the routing issues of an FPGA because there's no routing hardware in the way. But it is also nuts because there's no routing fabric to get data rapidly across the chip. If you can unlearn the aversion to latency that we've all had since the days of TTL and the IMSAI, you realize that you could clock an array of 16 Billion cells slowly to save power at 1Mhz, and still get a million tokens/sec. It's all a questiron of programming. (Which is where I'm stuck right now, analysis paralysis) [1]