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open-sdr
openwifi
C2020–2026
open-sdr / openwifi

openwifi

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software

Systems & InfrastructureHardware & Embedded
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14Distinct people
21Mentions
0Explicit recommenders
4.9KGitHub stars
REPOSITORY AT A GLANCE

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What it is

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software

GitHub

Where it is used

No documented product use was verified in the last source check.

What people are saying

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Also in these discussions

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This week on Hacker News

Nov 8–Nov 15 UTC · Direct repository links and separately labeled related project stories. Indexed through 11/15/2026, 5:05:26 PM UTC.

No direct repository links were found in the indexed HN discussions over the past seven days. Older discussions are available below.

Mentions over time

HN mentions by year21 dated mentions

Observed mentions: 2020-01-06 16:20:55 UTC to 2026-07-07 08:52:36 UTC.

024682020-01-01 00:00:00 UTC to 2021-01-01 00:00:00 UTC (exclusive): 8 mentions; 2 submissions, 6 comments20202021-01-01 00:00:00 UTC to 2022-01-01 00:00:00 UTC (exclusive): 4 mentions; 0 submissions, 4 comments2022-01-01 00:00:00 UTC to 2023-01-01 00:00:00 UTC (exclusive): 1 mentions; 0 submissions, 1 comments2023-01-01 00:00:00 UTC to 2024-01-01 00:00:00 UTC (exclusive): 5 mentions; 0 submissions, 5 comments20232024-01-01 00:00:00 UTC to 2025-01-01 00:00:00 UTC (exclusive): 2 mentions; 0 submissions, 2 comments2025-01-01 00:00:00 UTC to 2026-01-01 00:00:00 UTC (exclusive): 0 mentions; 0 submissions, 0 comments2026-01-01 00:00:00 UTC to 2027-01-01 00:00:00 UTC (exclusive): 1 mentions; 0 submissions, 1 comments. Incomplete calendar period.2026*

* An incomplete calendar period is marked with an outlined bar. Its count is not directly comparable with a full period.

Counts come from the repository’s dated source evidence. Index cutoff: 2026-11-02 08:16:59 UTC.

View mention counts and date ranges
UTC ranges include their start and exclude their end. Select a period to filter the source evidence.
PeriodStart (UTC)End (exclusive, UTC)MentionsSubmissionsComments
20202020-01-01 00:00:00 UTC2021-01-01 00:00:00 UTC826
20212021-01-01 00:00:00 UTC2022-01-01 00:00:00 UTC404
20222022-01-01 00:00:00 UTC2023-01-01 00:00:00 UTC101
20232023-01-01 00:00:00 UTC2024-01-01 00:00:00 UTC505
20242024-01-01 00:00:00 UTC2025-01-01 00:00:00 UTC202
20252025-01-01 00:00:00 UTC2026-01-01 00:00:00 UTC000
2026 (partial)2026-01-01 00:00:00 UTC2027-01-01 00:00:00 UTC101

What Hacker News says

8 sources
jxj·Aug 26, 2020
A short answer: yes you can. A bit longer answer: Basically Linux gives packet to our driver, and then our driver gives the packet to our FPGA for further processing (queuing, modulation, CSMA, etc). So you can compose your packet in the driver or anywhere else that can communicate with the driver, then instruct the FPGA to send your packet at any frequency 70M~6GHz. It will be very worth to read the README and project document word by word on the github: https://github.com/open-sdr/openwifi . I believe you can already find answers of more questions there.
In Openwifi: Linux mac80211 compatible full-stack 802.11/Wi-Fi design based on SDR
jxj·Aug 26, 2020
Hello, This is the author Xianjun. When communicate with commercial device, tcp can achieve ~30M, UDP can achieve ~38M in 20MHz 11a/g non MIMO mode. We are still working hard to optimize the whole design, because we know it is not mature enough and there is still lots of work to be done. For example, the original PHY rx openofdm design is simplified a lot for a quite small fpga which means performance (like sensitive) is sacrificed. Now our FPGA is more advanced than the openofdm FPGA in USRP N210, so there is a chance to improve a lot on both performance and features (like MIMO and new standard). Recently nlnet.nl gives us a short term fund to complete the 802.11n feature: https://nlnet.nl/project/OpenWifi-80211n/index.html There are lots of information (including throughout) in the readme and “project document” on GitHub (https://githu
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b.com/open-SDR/openwifi). Worth to read word by word.
In Openwifi: Linux mac80211 compatible full-stack 802.11/Wi-Fi design based on SDR
MayeulC·Jul 7, 2020
IIRC there are a couple ways to produce the intended design. At the end of the day, fabs often take layouts in the GDSII format, which is documented and open. The Klayout open source visualizer is industry-standard in my experience. Now, how do you generate these layouts? It depends on what you are doing. If more on the experimental side of things, writing scripts to generate structures is fine, as long as these conform to the fab-provided design rules. Technically, that's still what everyone is doing at the industrial level, except the scripts -- often written in tcl -- are provided by the fab. Now if you have some FPGA experience, you are probably interested in logic synthesis tools. There are a few ones, I've seen some academic with their own place-and-route stage, for instance. https://open-src-soc.org/program.html#T-CHAPUT does that,
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I think. The slides linked above outline one of the possible ways to do this: leverage chisel ( https://www.chisel-lang.org/) and the FIRRTL intermediate representation for RTL description. A few tools can ingest the output and try to come up with a layout. Hammer (https://github.com/ucb-bar/hammer) is such a tool, but I don't think that PDK is available with it just yet. To be honest, I don't think commercial tools are that advanced, and it would be fairly doable to catch up. There is some interesting work in this field, but since fabbing is expensive, it tends to be more within the academic community than the free software one. I'd look for papers, not on Github, though that's slowly changing. The chip design world is a slow beast to turn around: everything in the fabrication process is optimized to maximize yield, hence very little leeway is allowed: "If it ain't broken, don't fix it" is the motto, for good reason: if changing humidity levels 0.2% can make a fab lose millions; they won't try to use new and experimental software. I'm watching this space, notably with Verilog alternatives such as Migen. The open source community starts to embrace FPGA, wich is already great. I wish more manufacturers opened up their bitstream, so maybe we need an open FPGA? Though this free fabbing offer would be a great fit for Wi-Fi chips, I think. I wonder if People at openwifi (https://github.com/open-sdr/openwifi) are interested? I hope that gives a few interesting pointers to whoever reads this :)
In Google offers free fabbing for 130nm open-source chips
MayeulC·May 15, 2020
Just something I didn't make clear in the above comment: I expect that Hardware-description-language-to-layout pipelines will improve a lot in the upcoming years, so if a process becomes viable for open hardware, projects that were developed on an FPGA (here is a wi-fi chip, for instance: https://github.com/open-sdr/openwifi) might be transferable with a lot less effort than doing everything from scratch. I would also like to point out that these tools will likely help us juice up a bit more performance from the existing processes, but we aren't really likely to see a lot more of Moore's scaling, going forward. So the door is open to new processes, that may or may not be open hardware-friendly. And current, top-end processes might also become cheaper over time. While I doubt a lot of new foundries will catch up with the end of Moore's sca
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le, it might actually become easier to get there, while disruptive technologies get some time to play catch-up. Together with innovative synthesis tools.
In US blocks shipments of semiconductors to Huawei

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