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pulp-platform
pulpino
C2016–2020
pulp-platform / pulpino

pulpino

An open-source microcontroller system based on RISC-V

4Distinct people
5Mentions
0Explicit recommenders
1.1KGitHub stars
REPOSITORY AT A GLANCE

What to know before exploring

What it is

An open-source microcontroller system based on RISC-V

GitHub

Where it is used

No documented product use has been verified yet.

What people are saying

No recommendation phrase was found in the indexed comments.

No classified warning is attached to this page. Read the discussions before treating silence as approval.

Also in these discussions

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This week on Hacker News

Nov 7–Nov 14 UTC · Direct repository links and separately labeled related project stories. Indexed through 11/14/2026, 1:49:46 PM UTC.

No direct repository links were found in the indexed HN discussions over the past seven days. Older discussions are available below.

Mentions over time

HN mentions by year5 dated mentions

Observed mentions: 2016-03-29 11:45:45 UTC to 2020-10-05 09:25:45 UTC.

012342016-01-01 00:00:00 UTC to 2017-01-01 00:00:00 UTC (exclusive): 4 mentions; 1 submissions, 3 comments20162017-01-01 00:00:00 UTC to 2018-01-01 00:00:00 UTC (exclusive): 0 mentions; 0 submissions, 0 comments2018-01-01 00:00:00 UTC to 2019-01-01 00:00:00 UTC (exclusive): 0 mentions; 0 submissions, 0 comments20182019-01-01 00:00:00 UTC to 2020-01-01 00:00:00 UTC (exclusive): 0 mentions; 0 submissions, 0 comments2020-01-01 00:00:00 UTC to 2021-01-01 00:00:00 UTC (exclusive): 1 mentions; 0 submissions, 1 comments2020

Counts come from the repository’s dated source evidence. Index cutoff: 2026-11-02 08:16:59 UTC.

View mention counts and date ranges
UTC ranges include their start and exclude their end. Select a period to filter the source evidence.
PeriodStart (UTC)End (exclusive, UTC)MentionsSubmissionsComments
20162016-01-01 00:00:00 UTC2017-01-01 00:00:00 UTC413
20172017-01-01 00:00:00 UTC2018-01-01 00:00:00 UTC000
20182018-01-01 00:00:00 UTC2019-01-01 00:00:00 UTC000
20192019-01-01 00:00:00 UTC2020-01-01 00:00:00 UTC000
20202020-01-01 00:00:00 UTC2021-01-01 00:00:00 UTC101

What Hacker News says

5 sources
All the major toolchains work on Linux. I personally liked Pynq http://www.pynq.io/, it works fairly well and is beefy enough to do non-toy projects with it. For something totally barebones you can try https://www.latticesemi.com/Products/DevelopmentBoardsAndKit..., it has the advantage that it has a very nice open source tool flow available for it: http://www.clifford.at/icestorm/. I own both boards and I work professionally with EDA tools, honestly the biggest cliff is setting up tooling and processes around a given project. If you don't want to do everything from scratch you need to either rely on proprietary libraries, which will cost you a fortune and/or lock you into a very specific tool flow (Synopsis Designware libraries). The other alternative is to use one of the open source ecosystems like https://github.com/m-labs/migen or too
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ling around Chisel or various scattered libraries of open-source components which are often hard to get to work together, but also this requires a massive amount of time investment to just get the synthesis / simulation flow working. The situation is slowly improving and there are various university research groups and corporations that have released larger amounts of open source code that one can use as a starting point: - https://github.com/openhwgroup/cva6 (mostly done by ETHZ people initially, also see https://github.com/pulp-platform/pulpino) - https://github.com/chipsalliance/Cores-SweRV-EL2 (one of several high quality open-source RISC-V cores by Western Digital) - https://github.com/chipsalliance/rocket-chip (UCB by initial creators of RISC-V) - https://github.com/electronicvisions/nux (POWER based embedded processor, that we have used in several neuromorphic chip tapeouts (silicon proven)) On the tooling side one great thing that happened is that the verilator open source simulator has gained a lot of traction. - https://github.com/verilator/verilator On the hardware synthesis side some exciting developments are also happening, mostly driven by the desire of companies like Google to be vendor independent for their Deep learning accelerator designs and through funding by DARPA.
In Running a Unix-like OS on a home-built CPU with a home-built C compiler
"The i960 looks pretty interesting, but it appears that they aren't manufactured anymore. Is there something roughly equivalent out there?" No. Closest thing in development with open code that I know about is Cambridge's CHERI processor that combines MIPS, capability-security, legacy compatibility, and FreeBSD. It's not exactly simple but it does some of things i960 intended. https://www.cl.cam.ac.uk/research/security/ctsrd/cheri/ "what is the state of the art in microprocessors for embedded systems and the like?" I only know stuff in that space that crosses into my research into high reliability, security, or subversion-resistance. Studying more MCU's for last one given gotta use old nodes. Found a few interesting things, though. Plasma is a MIPS CPU & SOC in around 4,000 lines of HDL. Already has RTOS and stuff. PULPino is like a RISC-V
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version of Arduino with 32-bit core & lots of peripheral stuff. Some MCU's, no link on hand, are including I/O coprocessors that give some of benefits Channel I/O and server offloaders have. Another strategy is including HW accelerators for common, high-CPU (or I/O) functions. Outside C & serial, JOP is small, efficient CPU for Java code. Sandia's SSP is similar but highly-assured & rad-hard. AAMP7G is most reliable/secure in embedded with low-power, decent speed, triplicated circuits, mathematical verification, separation kernel, & easy ISA. I'm keeping an eye out for others that include things like DSP's or parallel architectures that aren't just toys. All I'm seeing so far that are being fabbed or used on FPGA's. http://plasmacpu.no-ip.org:8080/cpu.htm https://github.com/pulp-platform/pulpino https://en.wikipedia.org/wiki/Channel_I/O http://www.jopdesign.com/ https://www.researchgate.net/profile/Victor_Winter/publicati... http://www.rockwellcollins.com/~/media/Files/Unsecure/Produc...
In Build your own 6502 Microprocessor Kit
RISC-V is the best open one to get on right now. The ISA is well-designed plus open. There are simulators, high-speed CPU's, compilers, and so on for it. Surprisingly, many big companies are also backing it on top of the academics doing it. There's at least a dozen RISC-V implementations in progress. Many examples here: http://www.lowrisc.org/blog/2016/01/third-risc-v-workshop-da... Arduino-style implementation: https://github.com/pulp-platform/pulpino Note: OpenRISC is not RISC-V. It was a competing ISA that's fallen to the wayside as RISC-V's popularity soared. It did get used in Milkymist IIRC. Best to ignore it except maybe out of personal curiosity in favor of RISC-V and SPARC.
In Building a SuperH-compatible CPU from scratch [video]
Key points - RISC-V implementation "The PULP quad-core IC was subject of a tape-out in 28nm from Globalfoundries in November 2015 while the first PULPino implementation (called Imperio) taped out in January 2016 in 65nm CMOS from UMC. The PULPino platform is available for RTL simulation, for FPGA and SoC . It has full debug support on all targets and includes a port of FreeRTOS. Operating at a clock frequency of 400MHz and 1.2V the chip consumes 32.8mW." License is this: "SOLDERPAD HARDWARE LICENSE version 0.51 This license is based closely on the Apache License Version 2.0, but is not approved or endorsed by the Apache Foundation." See https://github.com/pulp-platform/pulpino Apparently it has enough features to run FreeRTOS, but I don't think it comes with an MMU to run anything beefier. It's a microcontroller. However, there's nothing
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stopping someone trying to build a better SoC around it..
In Open-Source Processor Core Ready for IoT

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