cortex-m

FWIW teaching it critical sections is dead simple, and likely already done for you. Ex cortex M: https://github.com/rust-embedded/cortex-m/blob/master/cortex... You can look at asynch and things like https://github.com/rtic-rs/rtic and https://github.com/embassy-rs/embassy for common embedded patterns. You handle DMA the same way as on any other system - e.x. you mark the memory as system/uncached (and pin it if you have virtual memory on), you use memory barriers when you are told data has arrived to get the memory controller up to speed with what happened behind its back, and so on. You’re still writing the same code that controls the hardware in the same way, nothing about that is especially different in C vs Rust. I think there is very much a learning curve, and that friction is real - hiring people and teaching them Rust is harder th

https://github.com/avr-rust https://github.com/esp-rs https://github.com/rust-embedded/cortex-m Even the embedded world is slowly changing.

I do not have as strong of feelings as your parent, but: 1. A lot of the APIs make use of the typestate pattern, which is nice, but also very verbose, and might turn many people off. 2. The generated API documentation for the lower level crates relies on you knowing the feel for how it generates the various APIs. It can take some time to get used to, especially if you're used to the better documentation of the broader ecosystem. 3. A bunch of the ecosystem crates assume the "I am running one program in ring0" kind of thing, and not "I have an RTOS" sort of case. See the discussion in https://github.com/rust-embedded/cortex-m/issues/233 for example.

I don't think so. Once a function is compiled, it basically becomes a black box with a type signature so unless sleeping in a function affects its signature, that information is erased. If you pass in some kind of a sleep token that has to be used to sleep, then yeah I think you could enforce it by only being able to get that token in a non-atomic context and making it leak proof. The Cortex-M crate does something similar, but for proving that you are in an atomic context. Another function that expects a CriticalSection type is then assured that it's running without interrupts enabled. The type itself is zero sized so it's completely optimized away. https://github.com/rust-embedded/cortex-m/blob/master/src/in...