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YosysHQ
icestorm
Python2015–2023
YosysHQ / icestorm

icestorm

Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)

5Distinct people
6Mentions
0Explicit recommenders
1.2KGitHub stars
REPOSITORY AT A GLANCE

What to know before exploring

What it is

Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)

GitHub

Where it is used

No documented product use has been verified yet.

What people are saying

No recommendation phrase was found in the indexed comments.

No classified warning is attached to this page. Read the discussions before treating silence as approval.

Also in these discussions

No other repository is repeatedly linked in the same discussions.

This week on Hacker News

Nov 7–Nov 14 UTC · Direct repository links and separately labeled related project stories. Indexed through 11/14/2026, 5:04:57 PM UTC.

No direct repository links were found in the indexed HN discussions over the past seven days. Older discussions are available below.

Mentions over time

HN mentions by year6 dated mentions

Observed mentions: 2015-12-01 14:20:20 UTC to 2023-06-23 03:52:56 UTC.

0122015-01-01 00:00:00 UTC to 2016-01-01 00:00:00 UTC (exclusive): 1 mentions; 0 submissions, 1 comments20152016-01-01 00:00:00 UTC to 2017-01-01 00:00:00 UTC (exclusive): 0 mentions; 0 submissions, 0 comments2017-01-01 00:00:00 UTC to 2018-01-01 00:00:00 UTC (exclusive): 0 mentions; 0 submissions, 0 comments2018-01-01 00:00:00 UTC to 2019-01-01 00:00:00 UTC (exclusive): 0 mentions; 0 submissions, 0 comments2019-01-01 00:00:00 UTC to 2020-01-01 00:00:00 UTC (exclusive): 0 mentions; 0 submissions, 0 comments20192020-01-01 00:00:00 UTC to 2021-01-01 00:00:00 UTC (exclusive): 1 mentions; 0 submissions, 1 comments2021-01-01 00:00:00 UTC to 2022-01-01 00:00:00 UTC (exclusive): 2 mentions; 0 submissions, 2 comments2022-01-01 00:00:00 UTC to 2023-01-01 00:00:00 UTC (exclusive): 0 mentions; 0 submissions, 0 comments2023-01-01 00:00:00 UTC to 2024-01-01 00:00:00 UTC (exclusive): 2 mentions; 0 submissions, 2 comments2023

Counts come from the repository’s dated source evidence. Index cutoff: 2026-11-02 08:16:59 UTC.

View mention counts and date ranges
UTC ranges include their start and exclude their end. Select a period to filter the source evidence.
PeriodStart (UTC)End (exclusive, UTC)MentionsSubmissionsComments
20152015-01-01 00:00:00 UTC2016-01-01 00:00:00 UTC101
20162016-01-01 00:00:00 UTC2017-01-01 00:00:00 UTC000
20172017-01-01 00:00:00 UTC2018-01-01 00:00:00 UTC000
20182018-01-01 00:00:00 UTC2019-01-01 00:00:00 UTC000
20192019-01-01 00:00:00 UTC2020-01-01 00:00:00 UTC000
20202020-01-01 00:00:00 UTC2021-01-01 00:00:00 UTC101
20212021-01-01 00:00:00 UTC2022-01-01 00:00:00 UTC202
20222022-01-01 00:00:00 UTC2023-01-01 00:00:00 UTC000
20232023-01-01 00:00:00 UTC2024-01-01 00:00:00 UTC202

What Hacker News says

6 sources
I'd also vote for an FPGA Mainboard, ideally Lattice, ideally iCE40, and ideally compatible with Project IceStorm (Yosys, Arachne-pnr, and IceStorm) open source tools: https://github.com/YosysHQ/icestorm Think something similar to MiSTer FPGA -- but in a laptop form factor, and able to run all sorts of "soft" CPUs on it, including (but not limited to) the following: https://opencores.org/projects?expanded=Processor
In Framework Laptop feature requests – RISC-V Mainboard (2021)
As others have already mentioned the Lattice ice40 family is supported by OSS chains through project icestorm [0]. There were some nice boards floating around though you may have to watch out for supply chain issues still plaguing this market. Examples: - icoboard: has the 8k LUTs chip, comes with soldered PMODs[1], if you get it watch out as you either need a RaspberryPI with GPIOs soldered to program it, or you purchase their USB FTDI interface in addition. See: http://icoboard.org/ - iCEBreaker, comes with the 5k LUTs chip, has the USB-FTDI interface built-in, but you need to solder the PMODs yourself. See: https://www.crowdsupply.com/1bitsquared/icebreaker-fpga#prod... [0] https://github.com/YosysHQ/icestorm [1] https://digilent.com/reference/pmod/start
In Learning Verilog and FPGA
>The rest of this page explains how to compile and install a "bitstream" file to implement this processor in a cheap (about $50) FPGA board, then how to build Linux for that board and boot it to a shell prompt. >Numato: The cheapest usable FPGA development board ($50 US) the j2 build system currently targets is the Numato Mimas v2 (also available on amazon). It contains a Xlinux "Spartan 6" LX9 FPGA that can run a J2 at 50mhz, 64 megs of SDRAM, USB2 mini-B, and a micro-sd card slot. PDS: Nice! But, it would be an additional serious "would be nice"(!) -- if this could run on Lattice FPGA's / IceStorm Open Source Toolchain: https://www.latticesemi.com/Products http://www.clifford.at/icestorm/ https://github.com/YosysHQ/icestorm
In J2 open processor: an open source processor using the SuperH ISA
I've so far been quite happy with the iCE40UP5k[1] based dev kit I got, though there are a lot of options out there[2]. The iCE40 FPGAs are a bit whimpy compared to Altera and Xilinx offerings from what I understand, but I really liked the idea of an open-source toolchain[3][4] being available. To get a taste without committing cash you could just use a simulator[5], which I imagine you'd be using a fair bit anyway as it allows you easier access to the internal state. As to actually programming, I've found the following resources useful. I started with Verilog mainly because code-gen tools like nMigen[6] generate Verilog, but for writing by hand it seems VHDL is preferred. Anyway, links, first off some exercises to get going[7]. Introduction to Verilog[8], also has a nice general overview of HDL. Details of how non-blocking vs blocking st
Read the rest
atements in Verilog works[9], quite specific but was very informative for me. There's also quite a lot of activity over at Reddit[10], and good experiences over at the EEVBlog forums[11]. As I said I just got started so no expert yet :) [1]: https://www.digikey.com/product-detail/en/lattice-semiconduc... [2]: https://joelw.id.au/FPGA/CheapFPGADevelopmentBoards [3]: https://symbiflow.github.io/ [4]: https://github.com/cliffordwolf/icestorm [5]: http://iverilog.icarus.com/ [6]: https://nmigen.org [7]: https://www.fpga4fun.com/ [8]: https://www.chipverify.com/verilog/verilog-tutorial [9]: http://sunburst-design.com/papers/CummingsSNUG2002Boston_NBA... [10]: https://www.reddit.com/r/FPGA/ [11]: https://www.eevblog.com/forum/fpga/
In Qnice – An Elegant 16 Bit Processor

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