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olofk
serv
Verilog2019–2026
olofk / serv

serv

SERV - The SErial RISC-V CPU

24Distinct people
27Mentions
0Explicit recommenders
1.9KGitHub stars
REPOSITORY AT A GLANCE

What to know before exploring

What it is

SERV - The SErial RISC-V CPU

GitHub

Where it is used

No documented product use was verified in the last source check.

What people are saying

No recommendation phrase was found in the indexed comments.

No classified warning is attached to this page. Read the discussions before treating silence as approval.

Also in these discussions

Mentioned in the same Hacker News threads. That is not proof they are substitutes.

This week on Hacker News

Nov 8–Nov 15 UTC · Direct repository links and separately labeled related project stories. Indexed through 11/15/2026, 7:24:48 PM UTC.

No direct repository links were found in the indexed HN discussions over the past seven days. Older discussions are available below.

Mentions over time

HN mentions by year27 dated mentions

Observed mentions: 2019-08-14 14:26:27 UTC to 2026-10-08 02:27:55 UTC.

02462019-01-01 00:00:00 UTC to 2020-01-01 00:00:00 UTC (exclusive): 1 mentions; 0 submissions, 1 comments20192020-01-01 00:00:00 UTC to 2021-01-01 00:00:00 UTC (exclusive): 2 mentions; 0 submissions, 2 comments2021-01-01 00:00:00 UTC to 2022-01-01 00:00:00 UTC (exclusive): 3 mentions; 0 submissions, 3 comments2022-01-01 00:00:00 UTC to 2023-01-01 00:00:00 UTC (exclusive): 5 mentions; 0 submissions, 5 comments20222023-01-01 00:00:00 UTC to 2024-01-01 00:00:00 UTC (exclusive): 5 mentions; 3 submissions, 2 comments2024-01-01 00:00:00 UTC to 2025-01-01 00:00:00 UTC (exclusive): 6 mentions; 1 submissions, 5 comments2025-01-01 00:00:00 UTC to 2026-01-01 00:00:00 UTC (exclusive): 2 mentions; 0 submissions, 2 comments2026-01-01 00:00:00 UTC to 2027-01-01 00:00:00 UTC (exclusive): 3 mentions; 2 submissions, 1 comments. Incomplete calendar period.2026*

* An incomplete calendar period is marked with an outlined bar. Its count is not directly comparable with a full period.

Counts come from the repository’s dated source evidence. Index cutoff: 2026-11-02 08:16:59 UTC.

View mention counts and date ranges
UTC ranges include their start and exclude their end. Select a period to filter the source evidence.
PeriodStart (UTC)End (exclusive, UTC)MentionsSubmissionsComments
20192019-01-01 00:00:00 UTC2020-01-01 00:00:00 UTC101
20202020-01-01 00:00:00 UTC2021-01-01 00:00:00 UTC202
20212021-01-01 00:00:00 UTC2022-01-01 00:00:00 UTC303
20222022-01-01 00:00:00 UTC2023-01-01 00:00:00 UTC505
20232023-01-01 00:00:00 UTC2024-01-01 00:00:00 UTC532
20242024-01-01 00:00:00 UTC2025-01-01 00:00:00 UTC615
20252025-01-01 00:00:00 UTC2026-01-01 00:00:00 UTC202
2026 (partial)2026-01-01 00:00:00 UTC2027-01-01 00:00:00 UTC321

What Hacker News says

5 sources
>anybody knows if such a mini board with plenty of GPIOs and usb-c (device/host/board power) and a risc-v MCU, but 64bits, does exists? Something like the Milk-V Duo[0]? More options in this nice list[1]. >(This would be for a 100% 64bits risc-v assembly keyboard firmware). I would go with a small FPGA (iCE40 e.g. LP640 or LP1K, or GW1N) and SERV[2]. 0. https://milkv.io/duo 1. https://codeberg.org/20-100/Awesome_RISC-V/src/branch/master... 2. https://github.com/olofk/serv
In Linux on RISC-V on Arduino Uno
> It would have been nice if they had tried a quantitative comparison with the Risc-V RV32I It would. If they had a Time Machine. ZPU is over a decade and a half old… Back from from when we called RISC-V just "MIPS" But since you asked. It IS small. The smallest sane RV32 core I can find is PicoRV, which uses 750-2000 LUS[1]. SERV [2] does claim to only need 440 LUTs, but its performance (most instrs take over 32 cycles) makes even ZPU seem speedy... The ZPU uses 442 LUTs[3]. [1] https://github.com/YosysHQ/picorv32 [2] https://github.com/olofk/serv [3] https://opencores.org/projects/zpu
In Zylin ZPU: 32 bit CPU with GCC toolchain

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