riscv-boom

Maybe I'm missing the relevant nexus between Linux, Open Source, and RISC-V, but I'm pretty sure BOOM [1] was already running Linux ~2 years ago. [1] https://github.com/ucb-bar/riscv-boom

My understanding is, if the ISA is open, it's not nearly as important if the CPU design itself is not, because you can always choose another vendor. Having said that, there are open-source designs for RISC-V CPUs. If you have a FPGA lying around, you can compile BOOM [1] for it and have Linux running on that, although not at particularly impressive speeds of course. There's also lowRISC [2], which is working on a mass-produced development board with an open-source RISC-V CPU, in a format similar to a Raspberry PI. Their timeline says that they hope to be ready for crowd-funding the initial production run sometime this year. [1] https://github.com/ucb-bar/riscv-boom [2] http://www.lowrisc.org/

It's an instruction set architecture with different extensions, a "family" if you would. Just like ARM has 32-bit Cortex M0..M4 microcontrollers, as well as ARM64 with MMU and the works. These RISC-V silicon implementations on CrowdSupply are on the low end, RV32I (32-bits, integer-only). The SiFive one supports M (multiply) A (atomic) C (compressed, like Thumb for ARM) extensions. No, you cannot build a smartphone with these. But there are other implementations. An example high-end implementation, 64-bits (you cannot buy silicon yet, but maybe you can burn your own FPGA) is BOOM: https://github.com/ucb-bar/riscv-boom